P4 und RC5 = *rofl*

Zitat

Well, it was confirmed by Moose today that there won't be a bitslicing core for the P4. It seems that it doesn't have enough GP registers(in lamen's terms, it's not powerful enough) to do the job. While Dnet will continue to eak out some enhanced P4 cores, there's only so much they can do, since it has a 4 cycle ROTL latency(ROTL is an instruction RC5 uses a lot). Right now, Dnet and gang are only getting 1.3 kkeys/mhz/sec, meaning that unless the P4 ramps well, don't bet on seeing it blow the G4 or Athlon away any time soon