AMDs Evergreen kommt am 10. September

Zitat von tinker

die letzten beiden serien waren eh erfolgreich?!

Zitat von quad-prozzi-fan

@mat: wie schauts aus, bekommst du kein Sample in die Finger, dann hätten wir mal unabhängige Benchmarks?

Zitat von mat

Ich arbeite daran. Ist nicht ganz so einfach, weil AMD die österreichische Presse nur zweitrangig beliefert, da die deutschen Medien ihrer Meinung sowieso zu uns "ausstrahlen" und es daher nicht nötig ist.

Deshalb versuchen wir es gerade über eine ganz andere Schiene bei AMD. Nun ja, es bleibt spannend, ob wir so vorab bekommen können.

Zitat von mat

Ich arbeite daran. Ist nicht ganz so einfach, weil AMD die österreichische Presse nur zweitrangig beliefert, da die deutschen Medien ihrer Meinung sowieso zu uns "ausstrahlen" und es daher nicht nötig ist.

Deshalb versuchen wir es gerade über eine ganz andere Schiene bei AMD. Nun ja, es bleibt spannend, ob wir so vorab bekommen können.

Zitat von Robert83

Na, falls das stimmt, tut sich Nvidia momentan wohl deutlich schwerer mit der neuen Generation:
"Doch die Zahlen, die von der Webseite 'SemiAccurate' gemeldet werden, sind alles andere als gut. Demnach hat man aus den ersten vier Wafern zusammen 416 Chips produzieren lassen. Darunter sollen sich lediglich sieben brauchbare Exemplare befinden. Die Ausbeute würde also lediglich 1,7 Prozent betragen."

http://winfuture.de/news,49942.html

Zitat

Can it be that bad? Sure, it can always be zero.

Let's just assume ALL of Charlie's numbers and sources are 100% correct...its four wafers.

Getting low yields on four wafers is not exactly uncommon. And it especially comes as no surprise for a hot lot as typically hot lots have nearly all the inline inspection metrology steps skipped in order to reduce the cycle-time all the more.

Those inline inspections are present in the flow for standard priority wip for a reason, related to both yield (reworks and cleanups) as well as cost reduction (eliminate known dead wip earlier in the flow).

I really pity anyone who is wasting their time attempting to extrapolate the future health of an entire product lineup based on tentative results from four hot-lotted wafers. That's not a put down to anyone who is actually doing just that, including Charlie, its an honest empathetic response I have for them because they really are wasting their time chasing after something with error bars so wide they can't see the ends of the whiskers from where they stand at the moment.

Now if we were talking about results averaged from say 6-8 lots and a minimum of 100-200 wafers ran thru the fab at standard priority (i.e. with all the standard yield enhancement options at play) then I'd be more inclined to start divining something from the remnants of the tea leaves here.

But just four wafers? Much ado about nothing at the moment, even IF all of the claimed details themselves are true.

This would have been far more interesting had the yields on those four wafers came back as 60% or 80%, again not that such yield numbers could be used to say anything about the average or the stdev of the yield distribution but it would speak to process capability and where there is proven capability there is an established pathway to moving the mean of the distribution to that yield territory.

But getting zero, or near-zero, yield is the so-called trivial result, it says almost nothing about process yield to get four wafers at zero yield. All it takes is one poorly performing machine during one process step and you get four wafers with yield killing particles spewed on them.